Percona Live: Data Performance Conference 2016 Logo

April 18-21, 2016

Santa Clara, California

Accelerating Ceph for Database Workloads with an all PCIe SSD Cluster

Accelerating Ceph for Database Workloads with an all PCIe SSD Cluster

 19 April 3:50 PM - 04:40 PM @ Room 203
Experience level: 
Intermediate
Duration: 
50 minutes conference
Tracks:
Big Data
Topics:
Tools and Techniques
Data in the Cloud

Description

PCIe SSDs are becoming increasingly popular for deploying latency sensitive workloads such as database and big data in enterprise and service provider environments. Customers are exploring low latency workloads on Ceph using PCIe SSDs to meet their performance needs. In this session, we will look at a high IOPS, low latency workload deployment on Ceph, performance analysis on all PCIe configurations, best practices and recommendations.

Speakers

Reddy Chagam's picture

Reddy Chagam

Principal Engineer & Chief SDS Architect, Intel

Biography:

Anjaneya "Reddy" Chagam is a Principal Engineer in Intel Data Center Storage Group. He is responsible for developing Software Defined Storage architecture and technology initiatives within Intel. He has 20 years of software development, architecture and systems engineering expertise in enterprise and cloud computing environments. He joined Intel in 1995 in Technology and Manufacturing division where he was responsible for delivering automation solutions across 8 process technology generations and was instrumental in delivering IA based mission-critical manufacturing solutions. He worked with several fortune 500 companies to deliver scalable data center solutions using Intel technologies. Reddy has a bachelor's and master’s degree in Computer Science and Engineering.

Tushar Gohad's picture

Tushar Gohad

Senior Engineer, Intel

Biography:

Tushar is part of Intel's Data Center Group where his primary area of focus is Software Defined/Scale-out Storage Architecture. Tushar has been working in the open-source networking and storage-related technologies for over a decade now – his recent contributions were to Erasure Code data path in OpenStack Swift, Intel’s Storage Performance Dev Kit (SPDK) and networking in the Linux kernel. Prior to joining Intel, Tushar was a lead open-source/Linux kernel developer at Cavium Networks/MontaVista Software where his focus was data-plane packet processing acceleration in all-Linux environments involving UIO, IPv6 enabling in the Linux ecosystem, Linux namespaces/containers and Linux IPsec scalability improvements. Tushar holds a Masters degree in Computer Science.

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